r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 336

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Notes: 1. Setting the TOCL bit to 1 prevents accidental modification when the CPU goes out of
Table 10.30 Output Level Select Function
Note: The reverse phase waveform initial output value changes to active level after elapse of the
Rev. 1.00 Sep. 21, 2007 Page 310 of 1124
REJ09B0402-0100
Bit
3
2
1
0
Bit 1
OLSN
0
1
dead time after count start.
2. Clearing the TOCS0 bit to 0 makes this bit setting valid.
Bit Name
TOCL
TOCS
OLSN
OLSP
Initial Output
High level
Low level
control.
Initial
Value
0
0
0
0
Active Level
Low level
High level
R/W
R/(W)* TOC Register Write Protection*
R/W
R/W
R/W
Description
This bit selects the enable/disable of write access to the
TOCS, OLSN, and OLSP bits in TOCR1.
0: Write access to the TOCS, OLSN, and OLSP bits is
1: Write access to the TOCS, OLSN, and OLSP bits is
TOC Select
This bit selects either the TOCR1 or TOCR2 setting to
be used for the output level in complementary PWM
mode and reset-synchronized PWM mode.
0: TOCR1 setting is selected
1: TOCR2 setting is selected
Output Level Select N*
This bit selects the reverse phase output level in reset-
synchronized PWM mode/complementary PWM mode.
See table 10.30.
Output Level Select P*
This bit selects the positive phase output level in reset-
synchronized PWM mode/complementary PWM mode.
See table 10.31.
Up Count
High level
Low level
enabled
disabled
Function
Compare Match Output
2
2
Down Count
Low level
High level
1

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