r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 803

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

Section 19 Controller Area Network (RCAN-ET)
When RCAN-ET recognises the end of the Arbitration field while receiving a message, it starts
comparing the received identifier to the identifiers set in the Mailboxes, starting from Mailbox-15
down to Mailbox-0. It first checks the MBC if it is configured as a receive box, and reads LAFM,
and reads the CAN-ID of Mailbox-15 (if configured as receive) to finally compare them to the
received ID. If it does not match, the same check takes place at Mailbox-14 (if configured as
receive). Once RCAN-ET finds a matching identifier, it stores the number of Mailbox-[N] into an
internal buffer, stops the search, and goes back to idle state, waiting for the EndOfFrame (EOF) to
th
come. When the 6
bit of EOF is notified by the CAN Interface logic, the received message is
written or abandoned, depending on the NMC bit. No modification of configuration during
communication is allowed. Entering Halt Mode is one of ways to modify configuration. If it is
written into the corresponding Mailbox, including the CAN-ID, i.e., there is a possibility that the
CAN-ID is overwritten by a different CAN-ID of the received message due to the LAFM used.
This also implies that, if the identifier of a received message matches to ID + LAFM of 2 or more
Mailboxes, the higher numbered Mailbox will always store the relevant messages and the lower
numbered Mailbox will never receive messages. Therefore, the settings of the identifiers and
LAFMs need to be carefully selected.
With regards to the reception of data and remote frames described in the above flow diagram the
clearing of the UMSR flag after the reading of IRR is to detect situations where a message is
overwritten by a new incoming message stored in the same mailbox while the interrupt service
routine is running. If during the final check of UMSR a overwrite condition is detected the
message needs to be discarded and read again.
In case UMSR is set and the Mailbox is configured for overrun (NMC = 0) the message is still
valid, however it is obsolete as it is not reflecting the latest message monitored on the CAN Bus.
Please access the full Mailbox content before clearing the related RXPR/RFPR flag.
Please note that in the case a received remote frame is overwritten by a data frame, both the
remote frame request interrupt (IRR2) and data frame received interrupt (IRR1) and also the
Receive Flags (RXPR and RFPR) are set. In an analogous way, the overwriting of a data frame by
a remote frame, leads to setting both IRR2 and IRR1.
In the Overrun Mode (NMC = ’0’), only the first Mailbox will cause the flags to be asserted. So, if
a Data Frame is initially received, then RXPR and IRR1 are both asserted. If a Remote Frame is
then received before the Data Frame has been read, then RFPR and IRR2 are NOT set. In this case
UMSR of the corresponding Mailbox will still be set.
Rev. 1.00 Sep. 21, 2007 Page 777 of 1124
REJ09B0402-0100