r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 773

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

• BCR0 (Address = H'006)
Initial value:
Bits 8 to 15 : Reserved. The written value should always be '0' and the returned value is '0'.
Bits 7 to 0—Baud Rate Pre-scale (BRP[7:0] = BCR0 [7:0]): These bits are used to define the
peripheral bus clock periods contained in a Time Quantum.
• Requirements of Bit Configuration Register
PRSEG:
PHSEG1:
PHSEG2:
TSEG1:
Bit 7:
BRP[7]
0
0
0
:
:
1
SYNC_SEG: Segment for establishing synchronisation of nodes on the CAN bus. (Normal bit
edge transitions occur in this segment.)
R/W:
Bit:
Bit 6:
BRP[6]
0
0
0
:
:
1
15
R
0
-
Segment for compensating for physical delay between networks.
Buffer segment for correcting phase drift (positive). (This segment is extended
when synchronisation (resynchronisation) is established.)
Buffer segment for correcting phase drift (negative). (This segment is shortened
when synchronisation (resynchronisation) is established)
TSG1 + 1
14
R
0
-
Bit 5:
BRP[5]
0
0
0
:
:
1
13
R
SYNC_SEG
0
-
1
12
Bit 4:
BRP[4]
0
0
0
:
:
1
R
0
-
11
R
0
-
Bit 3:
BRP[3]
0
0
0
:
:
1
PRSEG
1-bit time (8-25 quanta)
10
R
0
-
TSEG1
4-16
R
9
0
-
Bit 2:
BRP[2]
0
0
0
:
:
1
PHSEG1
R
8
0
-
Bit 1:
BRP[1]
0
0
1
:
:
1
R/W
Section 19 Controller Area Network (RCAN-ET)
7
0
Rev. 1.00 Sep. 21, 2007 Page 747 of 1124
R/W
TSEG2
6
0
2-8
Bit 0:
BRP[0]
0
1
0
:
:
1
R/W
5
0
Quantum
R/W
Description
2 X peripheral bus clock
(Initial value)
4 X peripheral bus clock
6 X peripheral bus clock
2*(register value+1) X
peripheral bus clock
512 X peripheral bus clock
4
0
BRP[7:0]
R/W
3
0
REJ09B0402-0100
R/W
2
0
R/W
1
0
R/W
0
0