r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 544

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 12 Port Output Enable (POE)
(2)
Figure 12.3 shows the low-level detection operation. Sixteen continuous low levels are sampled
with the sampling clock selected by ICSR1 to ICSR3. If even one high level is detected during this
interval, the low level is not accepted.
The timing when the large current pins enter the high-impedance state after the sampling clock is
input is the same in both falling-edge detection and in low-level detection.
12.4.2
Figure 12.4 shows an example of the output-level compare operation for the combination of
TIOC3B and TIOC3D. The operation is the same for the other pin combinations.
Rev. 1.00 Sep. 21, 2007 Page 518 of 1124
REJ09B0402-0100
Low-Level Detection
Sampling
clock
POE input
PE9/
TIOC3B
When low level is
sampled at all points
When high level is
sampled at least once
Note: * Other large current pins also enter the high-impedance state with the same timing.
Output-Level Compare Operation
PE9/
TIOC3B
PE11/
TIOC3D
Figure 12.4 Output-Level Compare Operation
Figure 12.3 Low-Level Detection Operation
1
1
8/16/128 clock
cycles
2
2
3
Low level overlapping detected
High impedance state
16
13
High-impedance
state*
Flag set
(POE received)
Flag not set

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