r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 237

• Manufacturer Part Number: r5f71374an80fpv
• Description: 32-bit Risc Microcomputer Superh?? Risc Engine Family
• Manufacturer: Renesas Electronics Corporation.

9.4.2
CSnBCR is a 32-bit readable/writable register that specifies the data bus width of the respective
space, and the number of wait cycles between access cycles.
Initial value:
Initial value:
Bit
31, 30
29, 28
27
Note:
Bit name:
R/W:
R/W:
Bit:
*
When the on-chip ROM is disabled, this bit is 0.
CSn Space Bus Control Register (CSnBCR) (n = 0 and 1)
Bit Name

IWW[1:0]

31
15
R
R
0
0
-
-
30
14
R
R
0
0
-
-
R/W
29
13
R
1
0
IWW[1:0]
-
Initial
Value
All 0
11
0
R/W
28
12
R
1
0
-
27
11
R
R
0
0
-
-
R/W
R
R/W
R
R/W
R/W
IWRWD[1:0]
26
10
0*
1
BSZ[1:0]
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Specification for Idle Cycles between Write-Read/Write-
Write Cycles
Specify the number of idle cycles to be inserted after
access to memory that is connected to the space. The
target cycles are write-read cycles and write-write
cycles.
00: No idle cycle inserted
01: 1 idle cycle inserted
10: 2 idle cycles inserted
11: 4 idle cycles inserted
Reserved
This bit is always read as 0. The write value should
always be 0.
R/W
R/W
25
1
9
1
24
R
R
0
8
0
-
-
R/W
IWRWS[1:0]
23
R
1
7
0
-
Rev. 1.00 Sep. 21, 2007 Page 211 of 1124
R/W
22
R
1
6
0
-
Section 9 Bus State Controller (BSC)
21
R
R
0
5
0
-
-
R/W
IWRRD[1:0]
20
R
1
4
0
-
R/W
19
R
1
3
0
-
REJ09B0402-0100
18
R
R
0
2
0
-
-
R/W
IWRRS[1:0]
17
R
1
1
0
-
R/W
16
R
1
0
0
-