r5f71374an80fpv Renesas Electronics Corporation., r5f71374an80fpv Datasheet - Page 254

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r5f71374an80fpv

Manufacturer Part Number
r5f71374an80fpv
Description
32-bit Risc Microcomputer Superh?? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet

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Section 9 Bus State Controller (BSC)
Table 9.7
Notes: The minimum numbers of idle cycles are described sequentially for Iφ:Bφ = 4:1, 3:1, 2:1,
Rev. 1.00 Sep. 21, 2007 Page 228 of 1124
REJ09B0402-0100
CSnWCR.WM
Setting
1
0
1
0
1
0
1
0
BSC Register Setting
and 1:1.
1. Minimum number of idle cycles between the byte access to address 0 and the byte
2. Other than the above cases
access to address 1 in the 16-bit access with an 8-bit bus width, and
minimum number of idle cycles between the byte accesses to address 0, to address 1,
to address 2, and to address 3 in the 32-bit access with an 8-bit bus width.
CSnBCR Idle
Setting
0
0
1
1
2
2
4
4
Minimum Number of Idle Cycles between CPU Access Cycles in Normal Space
Interface
Contin-uous
Read
0/0/0/0
1/1/1/1
1/1/1/1
1/1/1/1
2/2/2/2
2/2/2/2
4/4/4/4
4/4/4/4
*
1
Contin-uous
Write
0/0/0/0
1/1/1/1
1/1/1/1
1/1/1/1
2/2/2/2
2/2/2/2
4/4/4/4
4/4/4/4
*
1
When Access Size Exceeds Bus Width
Read to
Read
1/1/1/1
1/1/1/1
1/1/1/1
1/1/1/1
2/2/2/2
2/2/2/2
4/4/4/4
4/4/4/4
*
2
Write to
Write
0/0/0/0
1/1/1/1
1/1/1/1
1/1/1/1
2/2/2/2
2/2/2/2
4/4/4/4
4/4/4/4
*
2
Read to
Write
3/3/3/4
3/3/3/4
3/3/3/4
3/3/3/4
3/3/3/4
3/3/3/4
4/4/4/4
4/4/4/4
*
2
Write to
Read
0/0/0/0
1/1/1/1
1/1/1/1
1/1/1/1
2/2/2/2
2/2/2/2
4/4/4/4
4/4/4/4
*
2

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