HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1016

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 28 D/A Converter (DAC)
28.4
The D/A converter incorporates two D/A channels that can operate individually.
The D/A converter executes D/A conversion while analog output is enabled by the D/A control
register (DACR). If the D/A data registers (DADR0 and DADR1) are modified, the D/A converter
immediately initiates the new data conversion. When the DAOE1 and DAOE0 bits in the DACR
register are set to 1, D/A conversion results are output.
An example of D/A conversion for channel 0 is shown below. The operation timing is shown in
figure 28.2.
1. Write conversion data to DADR0.
2. When the DAOE0 bit in DACR is set to 1, D/A conversion starts. The results are output after
3. When D/A data register 0 (DMDR0) is modified, the conversion starts again.
4. When the DAOE0 bit is cleared to 0, analog output is disabled (high-impedance state).
Page 956 of 1414
the conversion has ended. The output value will be (DADR0 contents/255) × AVcc.
The conversion results are output continuously until DADR0 is modified or the DAOE0 bit is
cleared to 0.
The results are output after the conversion has ended.
Address bus
Operation
DADR0
DAOE0
[Legend]
t
DCONV
DA0
: D/A conversion time
write cycle
DADR0
High impedance
state
Figure 28.2 D/A Converter Operation Example
write cycle
DACR
t
DCONV
Conversion data (1)
Conversion result (1)
write cycle
DADR0
t
DCONV
Conversion data (2)
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Conversion
result (2)
write cycle
DACR
Sep 21, 2010

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