HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 195

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
3.5.7
Figure 3.16 shows the multiply operation flow. Table 3.25 shows the variation of this type of
operation and table 3.26 shows the correspondence between each operand and registers. The
multiply operation of the DSP unit is single-word signed single-precision multiplication. These
operations are executed in the DSP stage, as shown in figure 3.10. The DSP stage is the same
stage as the MA stage in which memory access is performed.
If a double-precision multiply operation is needed, the CPU standard double-word multiply
instructions can be made of use.
Table 3.25 Variation of Fixed-Point Multiply Operation
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Mnemonic
PMULS
Fixed-Point Multiply Operation
Function
Signed multiplication
39
Figure 3.16 Fixed-Point Multiply Operation Flow
31
S
0
Source 1
39
31
S
MAC
Destination
0
Source 1
Se
39
1 0
0
31
S
Source 2
Source 2
Sf
Ignored
Section 3 DSP Operating Unit
0
Destination
Dg
Page 135 of 1414

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