HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 30

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

35.12 Port M ............................................................................................................................. 1203
35.13 Port P .............................................................................................................................. 1205
35.14 Port R.............................................................................................................................. 1207
35.15 Port S .............................................................................................................................. 1209
35.16 Port T .............................................................................................................................. 1211
35.17 Port U.............................................................................................................................. 1213
35.18 Port V.............................................................................................................................. 1215
Section 36 User Debugging Interface (H-UDI)...............................................1217
36.1
36.2
36.3
36.4
36.5
Page xxx of lx
35.11.1 Register Description ....................................................................................... 1201
35.11.2 Port L Data Register (PLDR).......................................................................... 1202
35.12.1 Register Description ....................................................................................... 1203
35.12.2 Port M Data Register (PMDR) ....................................................................... 1204
35.13.1 Register Description ....................................................................................... 1205
35.13.2 Port P Data Register (PPDR) .......................................................................... 1206
35.14.1 Register Description ....................................................................................... 1207
35.14.2 Port R Data Register (PRDR) ......................................................................... 1208
35.15.1 Register Description ....................................................................................... 1209
35.15.2 Port S Data Register (PSDR) .......................................................................... 1210
35.16.1 Register Description ....................................................................................... 1211
35.16.2 Port T Data Register (PTDR).......................................................................... 1212
35.17.1 Register Description ....................................................................................... 1213
35.17.2 Port U Data Register (PUDR)......................................................................... 1214
35.18.1 Register Description ....................................................................................... 1215
35.18.2 Port V Data Register (PVDR)......................................................................... 1216
Features........................................................................................................................... 1217
Input/Output Pins............................................................................................................ 1218
Register Descriptions...................................................................................................... 1220
36.3.1
36.3.2
36.3.3
36.3.4
36.3.5
Operation ........................................................................................................................ 1231
36.4.1
36.4.2
36.4.3
36.4.4
36.4.5
Boundary Scan................................................................................................................ 1234
Bypass Register (SDBPR) .............................................................................. 1220
Instruction Register (SDIR) ............................................................................ 1220
Shift Register .................................................................................................. 1221
Boundary Scan Register (SDBSR) ................................................................. 1221
ID Register (SDID) ......................................................................................... 1230
TAP Controller ............................................................................................... 1231
Reset Configuration ........................................................................................ 1232
TDO Output Timing ....................................................................................... 1232
H-UDI Reset ................................................................................................... 1233
H-UDI Interrupt .............................................................................................. 1233
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010