HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 385

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
9.4.4
SDCR specifies the method to refresh and access SDRAM, and the types of SDRAMs to be
connected.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
31 to 21 ⎯
20
19
18
17
16
15, 14
13
SDRAM Control Register (SDCR)
Bit Name
A2ROW1
A2ROW0
⎯
A2COL1
A2COL0
⎯
DEEP
Initial
Value
All 0
0
0
0
0
0
All 0
0
R/W
R
R/W
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Bits of Row Address for Area 2
Specify the number of bits of row address for area 2.
00: 11 bits
01: 12 bits
10: 13 bits
11: Reserved (setting prohibited)
Reserved
This bit is always read as 0. The write value should always
be 0.
Number of Bits of Column Address for Area 2
Specify the number of bits of column address for area 2.
00: 8 bits
01: 9 bits
10: 10 bits
11: Reserved (setting prohibited)
Reserved
These bits are always read as 0. The write value should
always be 0.
Deep Power-Down Mode
This bit is valid for low-power SDRAM. If the RMODE bit is
set to 1 while this bit is set to 1, the deep power-down entry
command is issued and the low-power SDRAM enters the
deep power-down mode.
0: Self-refresh mode
1: Deep power-down mode
Section 9 Bus State Controller (BSC)
Page 325 of 1414