HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1081

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
Hence the receive margin can be expressed as follows.
Formula for receive margin in smart card mode:
In the above formula, if F = 0 and D = 0.5, then the receive margin is as follows.
When D = 0.5, F = 0, M = (0.5 − 1/2 × 372) × 100%
(2)
Retransmit operations when the smart card interface is in receive mode and in transmit mode are
described below.
(a)
Figure 30.8 shows retransmit operations when the smart card interface is in receive mode. Step (1)
to step (5) of figure 30.8 correspond to the following operation.
1. If an error is detected as a result of checking the received parity bit, the PER bit in SCSSR is
2. The RDRF bit in SCSSR is not set for frames in which a parity error occurs.
3. If no error is detected as a result of checking the received parity bit, the PER bit in SCSSR is
4. If no error is detected as a result of checking the received parity bit, it is assumed that
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
where
M: Receive margin (%)
N: Ratio of the bit rate to the clock (N = 372)
D: Clock duty (D = 0 to 1.0)
L: Frame length (L = 10)
F: Absolute value of the deviation of the clock frequency
automatically set to 1. At this time, if the RIE bit in SCSCR is set to enable, an ERI request is
issued. The PER bit in SCSSR should be cleared to 0 before the sampling timing for the next
parity bit.
not set.
reception was completed normally, and the RDRF bit in SCSSR is automatically set to 1. If the
RIE bit in SCSCR is 1 and the EIO bit is 0, an RXI request is generated.
Retransmit Operation
Retransmission when the smart card interface is in receive mode (T = 0)
M = ( 0.5 −
= 49.866%.
2N
1
) −
( L − 0.5 ) F
− D − 0.5
N
( L + F ) × 100%
Section 30 SIM Card Module (SIM)
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