HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1169

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
Section 32 SSL Accelerator (SSL)
Section 32 SSL Accelerator (SSL)
SSL accelerator (SSL: Security Socket Layer) performs the RSA operation (RSA: Rivest Shamir
Adleman) with public key which is used to sign data with a digital signature, and encrypts or
decrypts the common key, DES (Data Encryption Standard), and Triple-DES that are used to
preserve secrecy of data in the network to perform efficient encryption communication.
With the RSA operation circuit, 32 to 512-bit width of addition, subtraction, and multiplication
and 512-bit width of macro operations as well as 512-bit width of RSA operation (modular
multiplication using multiple precision integers) are executed.
The SSL accelerator can use 56 bits or more encryption key. If to be exported or the like, the
necessary procedures must be taken according to the foreign exchange law. Please contact your
nearest Renesas sales office when you require the detailed functional specification for the SSL
accelerator.
R01UH0083EJ0400 Rev. 4.00
Page 1109 of 1414
Sep 21, 2010

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