HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 86

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 1 Overview
Page 26 of 1414
Classification
Clock
Operating mode
control
System control
Interrupts
Symbol
XTAL
CKIO
MD5 to MD0
RESETP
RESETM
STATUS1,
STATUS0
BREQ
BACK
CA
NMI
IRQ5 to IRQ0
IRL3 to IRL0
I/O
O
I/O
I
I
I
O
I
O
I
I
I
I
Name
Crystal
System clock
Mode set
Power-on reset When low, the system enters the
Manual reset
Status output
Bus request
Bus request
acknowledge
Chip active
Non-maskable
interrupt
Interrupt
requests 5 to 0
Interrupt
requests 3 to 0
Function
For connection to a crystal
resonator.
Used as a pin to input external
clock or output clock.
Sets the operating mode. Do not
change values on these pins
during operation.
MD2 to MD0 set the clock mode,
MD3 and MD4 set the bus width of
area 0 and MD5 sets the endian.
power-on reset state.
When low, the system enters the
manual reset state.
requests the release of the bus
mastership.
Indicates that the bus mastership
has been released to an external
device. Reception of the BACK
signal informs the device which
has output the BREQ signal that it
has acquired the bus.
High in normal operation, and low
in hardware standby mode.
Non-maskable interrupt request
pin. Fix to high level when not in
use.
Maskable interrupt request pins.
Selectable as level input or edge
input. The rising edge or falling
edge is selectable as the detection
edge. The low level or high level is
selectable as the detection level.
Maskable interrupt request pin.
Input a coded interrupt level.
Indicates the operating state.
Low when an external device
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010