HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 410

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 9 Bus State Controller (BSC)
Table 9.12 Relationship between A2/3BSZ[1:0], A2/3ROW[1:0], A2/3COL[1:0], and
Notes: 1. L/H is a bit used in the command specification; it is fixed at low or high according to the
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A2/3
BSZ
[1:0]
11 (32 bits)
Output Pin of
This LSI
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
2. Bank address specification
access mode.
Address Multiplex Output (1)-2
128-Mbit product (1 Mword x 32 bits x 4 banks, column 8 bits product): 1
64-Mbit product (1 Mword x 16 bits x 4 banks, column 8 bits product): 2
A2/3
ROW
[1:0]
01 (12 bits)
Row Address
Output
A24
A23
A23*
A22*
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
2
2
Setting
Example of connected memory
A2/3
COL
[1:0]
00 (8 bits)
Column Address
Output
A17
A16
A23*
A22*
A13
L/H*
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
2
2
Synchronous
DRAM Pin
A13 (BA1)
A12 (BA0)
A11
A10/AP
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Function
Unused
Specifies bank
address/precharge
Address
Unused
Address
Specifies
Sep 21, 2010