HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 141

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
3.1
This LSI incorporates a DSP unit and X/Y memory directly connected to the DSP unit. This LSI
supports the DSP extended function instruction sets needed to control the DSP unit and X/Y
memory. The DSP extended function instructions are classified into four groups.
(1)
If the DSP extended function is enabled, the following extended system control instructions can be
used for the CPU.
• Repeat loop control instructions and repeat loop control register access instructions are added.
• Modulo addressing control instructions and control register access instructions are added.
• DSP unit register access instructions are added. Some of the DSP unit registers can be used in
(2)
Data transfer instructions for data transfers between the DSP unit and on-chip X/Y memory are
called double-data transfer instructions. Instruction codes for these double-transfer instructions are
16 bit codes as well as CPU instruction codes. These data transfer instructions perform data
transfers between the DSP unit and on-chip X/Y memory that is directly connected to the DSP
unit. These data transfer instructions can be described in combination with other DSP unit
operation instructions. For details, refer to section 3.4, DSP Data Transfer Instructions.
(3)
Data transfer instructions for data transfers between DSP unit registers and all virtual address
spaces are called single-data transfer instructions. Instruction codes for the double-transfer
instructions are 16 bit codes as well as CPU instruction codes. These data transfer instructions
performs data transfers between the DSP unit registers and all virtual address spaces. For details,
refer to section 3.4, DSP Data Transfer Instructions.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Looped programs can be executed efficiently by using the zero-overhead repeat control unit.
For details, refer to section 3.3, CPU Extended Instructions.
Function allows access to data with a circular structure. For details, refer to section 3.4, DSP
Data Transfer Instructions.
the same way as the CPU system registers. For details, refer to section 3.4, DSP Data Transfer
Instructions.
Extended System Control Instructions for the CPU
Data Transfer Instructions for Data Transfers between DSP Unit and On-Chip X/Y
Memory
Data Transfer Instructions for Data Transfers between DSP Unit Registers and All
Virtual Address Spaces
DSP Extended Functions
Section 3 DSP Operating Unit
Section 3 DSP Operating Unit
DSPS301S_010020030200
Page 81 of 1414