HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1033

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
6
5
4
Bit Name
IREQE1
IREQE0
P0SCE
Initial Value R/W
0
0
0
R/W
R/W
R/W
Description
PCC0IREQ Request Enable
These bits enable or disable IREQ interrupt requests
and select the interrupt mode when the PC card
connected to area 6 is the I/O card interface type. Note
that bit 5 (P0IREQ) in the area 6 card status change
register (PCC0CSCR) is cleared if the values in bits 6
and 5 in this register are changed. These bits have no
meaning on the IC memory card interface.
00: IREQ requests are not accepted for the PC card
01: The level-mode IREQ interrupt request signal is
10: The pulse-mode IREQ interrupt request signal is
11: The pulse-mode IREQ interrupt request signal is
PCC0 Status Change Enable
When the PC card connected to area 6 is on the I/O
card interface, bit 4 enables or disables the interrupt
request when the value of the BVD1 (STSCHG) is
changed. This bit has no meaning in the IC memory
card interface.
0: No interrupt occurs for the PC card connected to
1: An interrupt occurs for the PC card connected to
area 6 regardless of the value of the BVD1
(STSCHG)
area 6 when the value of the BVD1 (STSCHG) is
changed from 1 to 0
connected to area 6. Bit 5 in the status change
register (PCC0CSCR) functions as a read-only bit
that indicates the inverse of the IREQ signal.
accepted for the PC card connected to area 6. In
level mode, an interrupt occurs when level 0 of the
signal input from the IREQ is detected.
accepted for the PC card connected to area 6. In
pulse mode, an interrupt occurs when a falling edge
from 1 to 0 of the signal input from the IREQ is
detected.
accepted for the PC card connected to area 6. In
pulse mode, an interrupt occurs when a rising edge
from 0 to 1 of the signal input from the IREQ is
detected.
Section 29 PC Card Controller (PCC)
Page 973 of 1414