HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 423

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
(4)
A read access ends in one cycle when data exists in non-cacheable region and the data bus width is
larger than or equal to access size. As the burst length is set to 1 in SDRAM burst read/single
write mode, only the required data is output. Consequently, no unnecessary bus cycles are
generated even when a cache-through area is accessed.
Figure 9.16 shows the single read basic timing.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Single Read
Figure 9.16 Basic Timing for Single Read (Auto-Precharge)
A12/A11*
D31 to D0
A25 to A0
DACKn*
Notes:
RD/WR
DQMxx
CKIO
RAS
CAS
CSn
BS
1
2
1. Address pin to be connected to the A10 pin of SDRAM.
2. The waveform for DACKn is when active low is specified.
Tr
Tc1
Td1
Tde
Tap
Section 9 Bus State Controller (BSC)
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