HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 763

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
21.3.10 Clock Select Register (SISCR)
SISCR is a 16-bit readable/writable register that sets the serial clock generation conditions for the
master clock. SISCR can be specified when the TRMD1 and TRMD0 bits in SIMDR are specified
as B'10 or B'11.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15
14
13
12
11
10
9
8
7 to 3
Bit Name
MSSEL
MSIMM
⎯
BRPS4
BRPS3
BRPS2
BRPS1
BRPS0
⎯
Initial
Value
1
1
0
0
0
0
0
0
All 0
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R
Description
Master Clock Source Selection
0: Uses the input signal of the SIOFMCLK pin as the
1: Uses Pφ as the master clock
The master clock is the clock input to the baud rate
generator.
Master Clock Direct Selection
0: Uses the output clock of the baud rate generator as the
1: Uses the master clock itself as the serial clock
Reserved
This bit is always read as 0. The write value should
always be 0.
Prescalar Setting
Set the master clock division ratio according to the count
value of the prescalar of the baud rate generator.
The range of settings is from B'00000 (× 1/1) to B'11111
(× 1/32).
Reserved
These bits are always read as 0. The write value should
always be 0.
master clock
serial clock
Section 21 Serial I/O with FIFO (SIOF)
Page 703 of 1414