HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1072

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 30 SIM Card Module (SIM)
30.4.5
(1)
Prior to data transmission and reception, the following procedure should be used to initialize the
smart card interface. Initialization is also necessary when switching from transmit mode to receive
mode, and when switching from receive mode to transmit mode. An example of the initialization
process is shown in the flowchart of figure 30.4.
Step (1) to step (7) of figure 30.4 correspond to the following operation.
1. Clear the TE and RE bits in the serial control register (SCSCR) to 0.
2. Clear the error flags PER, ORER, ERS, and WAIT_ER in the serial status register (SCSSR) to
3. Set the parity bit (O/E bit) in the serial mode register (SCSMR).
4. Set the LCB, PB, SMIF, SDIR, and SINV bits in the smart card mode register (SCSCMR).
5. Set the value corresponding to the bit rate to the bit rate register (SCBRR).
6. Set the clock source select bits (CKE1 and CKE0 bits) in the serial control register (SCSCR).
7. After waiting at least 1 etu, set the TIE, RIE, TE, RE, TEIE, and WAIT_IE bits in SCSCR.
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0.
At this time, the TIE, RIE, TE, RE, TEIE, and WAIT_IE bits should be cleared to 0.
If the CKE0 bit is set to 1, a clock signal is output from the SIM_CLK pin.
Except for self-check, the TE bit and RE bit should not be set simultaneously.
Initialization
Data Transmit/Receive Operation
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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