HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 309

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
8.3.2
ICR0 is a register that sets the input signal detection mode of the external interrupt input pin NMI,
and indicates the input signal level at the NMI pin.
Note:
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15
14 to 9 —
8
7 to 0
* The initial value is 1 when NMI input is high, 0 when NMI input is low.
Bit Name
NMIL
NMIE
Interrupt Control Register 0 (ICR0)
Initial
Value
0/1*
All 0
0
All 0
R/W
R
R
R/W
R
Description
NMI Input Level
Sets the level of the signal input at the NMI pin. This bit
can be read from to determine the NMI pin level. This bit
cannot be modified.
0: NMI input level is low
1: NMI input level is high
Reserved
These bits are always read as 0. The write value should
always be 0.
NMI Edge Select
Selects whether the falling or rising edge of the interrupt
request signal at the NMI pin is detected.
0: Interrupt request is detected on falling edge of NMI
1: Interrupt request is detected on rising edge of NMI
Reserved
These bits are always read as 0. The write value should
always be 0.
input
input
Section 8 Interrupt Controller (INTC)
Page 249 of 1414

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