HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 679
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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SH7720 Group, SH7721 Group
(4)
Figure 18.3 shows a sample serial transmission flowchart. After SCIF transmission is enabled, use
the following procedure to perform serial data transmission.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Transmitting and Receiving Data (Serial data transmission)
read 1 from TDFE bit and TEND flag
Write transmit data (16 - transmit
trigger set number) to SCFTDR,
Clear TE bit in SCSCR2 to 0
Read TEND bit in SCSSR2
Set SCPDR2 and SCPCR2
Read TDFE bit in SCSSR
in SCSSR, then clear to 0
All data transmitted?
End of transmission
Start transmission
Break output?
Figure 18.3 Sample Serial Transmission Flowchart
TEND= 1?
TDFE= 1?
Yes
Yes
Yes
Yes
(3)
No
No
No
No
(1)
(2)
(1) SCIF status check and transmit data write:
(2) Serial transmission continuation procedure:
(3) Break output at the end of serial
Section 18 Serial Communication Interface with FIFO (SCIF)
Read serial status register (SCSSR) and
check that the TDFE flag is set to 1, then
write transmit data to the transmit FIFO
data register (SCFTDR), read 1 from the
TDFE and TEND flags, then clear these
flags to 0.
The number of transmit data bytes that can
be written is 64 - (transmit trigger set
number).
To continue serial transmission, read 1 from
the TDFE flag to confirm that writing is
possible, then write data to SCFTDR2, and
then clear the TDFE flag to 0.
transmission:
To output a break in serial transmission, set
the port SC data register (SCPDR) and port
SC control register (SCPCR), then clear the
TE bit to 0 in the serial control register
(SCSCR).
In steps 1 and 2, it is possible to ascertain
the number of data bytes that can be
written from the number of transmit data
bytes in SCFTDR indicated by the upper 8
bits of the FIFO data count set register 2
(SCFDR).
Page 619 of 1414
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