HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 13

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

8.4
8.5
Section 9 Bus State Controller (BSC)................................................................279
9.1
9.2
9.3
9.4
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
8.3.7
8.3.8
8.3.9
8.3.10
8.3.11
8.3.12
8.3.13
8.3.14
8.3.15
Interrupt Sources............................................................................................................... 266
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
8.4.6
Operation .......................................................................................................................... 276
8.5.1
8.5.2
Features............................................................................................................................. 279
Input/Output Pins.............................................................................................................. 283
Area Overview.................................................................................................................. 285
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
Register Descriptions ........................................................................................................ 290
9.4.1
9.4.2
9.4.3
9.4.4
9.4.5
Interrupt Control Register 0 (ICR0).................................................................. 249
Interrupt Control Register 1 (ICR1).................................................................. 250
Interrupt Request Register 0 (IRR0) ................................................................. 252
Interrupt Request Register 1 (IRR1) ................................................................. 253
Interrupt Request Register 2 (IRR2) ................................................................. 254
Interrupt Request Register 3 (IRR3) ................................................................. 255
Interrupt Request Register 4 (IRR4) ................................................................. 256
Interrupt Request Register 5 (IRR5) ................................................................. 257
Interrupt Request Register 6 (IRR6) ................................................................. 259
Interrupt Request Register 7 (IRR7) ................................................................. 260
Interrupt Request Register 8 (IRR8) ................................................................. 261
Interrupt Request Register 9 (IRR9) ................................................................. 262
PINT Interrupt Enable Register (PINTER)....................................................... 264
Interrupt Control Register 2 (ICR2).................................................................. 265
NMI Interrupt.................................................................................................... 266
IRQ Interrupts ................................................................................................... 266
IRL interrupts.................................................................................................... 267
PINT Interrupts ................................................................................................. 268
On-Chip Peripheral Module Interrupts ............................................................. 268
Interrupt Exception Handling and Priority........................................................ 269
Interrupt Sequence ............................................................................................ 276
Multiple Interrupts ............................................................................................ 278
Area Division .................................................................................................... 285
Shadow Area..................................................................................................... 285
Address Map ..................................................................................................... 287
Area 0 Memory Type and Memory Bus Width ................................................ 289
Data Alignment................................................................................................. 289
Common Control Register (CMNCR) .............................................................. 291
CSn Space Bus Control Register (CSnBCR) .................................................... 294
CSn Space Wait Control Register (CSnWCR) ................................................. 299
SDRAM Control Register (SDCR) ................................................................... 325
Refresh Timer Control/Status Register (RTCSR) ............................................. 328
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