HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 949

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
26.3.17 LCDC Power Management Mode Register (LDPMMR)
LDPMMR controls the power supply circuit that provides power to the LCD module. The usage
of two types of power-supply control pins, LCD_VCPWC and LCD_VEPWC, and turning on or
off the power supply function are selected.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
15
14
13
12
11
10
9
8
7
6
Bit Name
ONC3
ONC2
ONC1
ONC0
OFFD3
OFFD2
OFFD1
OFFD0
⎯
VCPE
Initial Value
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
0: Disabled: LCD_VCPWC pin is masked and fixed
Description
LCDC Power-On Sequence Period
Set the period from LCD_VEPWC assertion to
LCD_DON assertion in the power-on sequence of
the LCD module in frame units.
Specify to the value of (the period) -1.
This period is the (c) period in figures 26.4 to 26.7,
Power-Supply Control Sequence and States of the
LCD Module. For details on setting this register,
see table 26.5, Available Power-Supply Control-
Sequence Periods at Typical Frame Rates. (The
setting method is common for ONA, ONB, OFFD,
OFFE, and OFFF.)
LCDC Power-Off Sequence Period
Set the period from LCD_DON negation to
LCD_VEPWC negation in the power-off sequence
of the LCD module in frame units.
Specify to the value of (the period) -1.
This period is the (d) period in figures 26.4 to 26.7,
Power-Supply Control Sequence and States of the
LCD Module.
Reserved
This bit is always read as 0. The write value should
always be 0.
Sets whether or not to enable a power-supply
control sequence using the LCD_VCPWC pin.
1: Enabled: LCD_VCPWC pin output is asserted
LCD_VCPWC Pin Enable
low
and negated according to the power-on or
power-off sequence
Section 26 LCD Controller (LCDC)
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