HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 745

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
Table 21.2 Operation in Each Transfer Mode
Notes: *1 The control data method is valid only when the FL bit is specified as 1xxx. (x: Don't
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
4
3 to 0
Transfer Mode
Slave mode 1
Slave mode 2
Master mode 1
Master mode 2
*2 Depending on the timing to start SYNC signal output in master mode 2, the SYNC
Bit Name
SYNCDL
⎯
care.)
signal of the head frame in the high period can be extended to I bit. For details, see
section 21.5, Usage Notes.
Master/Slave
Slave
Slave
Master
Master
Initial
Value
0
All 0
R/W
R/W
R
SIOFSYNC
Synchronous
pulse
Synchronous
pulse
Synchronous
pulse
L/R
Description
Data Pin Bit Delay for SIOFSYNC Pin
Valid when the SIOFSYNC signal is output as
synchronous pulse. Only one-bit delay is valid for
transmission or reception in slave mode.
0: No bit delay
1: 1-bit delay
Reserved
These bits are always read as 0. The write value should
always be 0.
Bit Delay
SYNCDL bit
No*
2
Section 21 Serial I/O with FIFO (SIOF)
Control Data Method*
Slot position
Secondary FS
Slot position
Not supported
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