HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 809

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
(2)
As the figure 22.3 shows, the ringing signal from the line is transformed to rectangular wave and
then input to AFEIF. The interrupt is generated at the falling edge of input wave in AFEIF
module.
(3)
Dial pulse interrupt is generated in the dial pulse transmit sequence when AFEIF reads 0H (end)
data from DPNQ register or all of 4 digits are output. Refer to section 22.4.3, DAA Interface about
dial pulse sequence.
(4)
Interrupt is generated as is shown in figure 22.4. That is, AFEIFI signal is generated by
performing OR operation on the four signals from ASTR1 in FIFO interrupt control and the two
signals from ASTR2 in DAA interrupt control, and then sent out to INTC as one interrupt signal
(AFECI).
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Ringing Interrupt Timing
Dial Pulse Interrupt Timing
Interrupt Generator Circuit
Interrupt occur
Ringing wave
ASTR1
(FIFO control)
ASTR2
(DAA control)
Input wave
Figure 22.3 Ringing Interrupt Occurrence Timing
Interrupt mask Interrupt factor
Interrupt mask Interrupt factor
Figure 22.4 Interrupt Generator
2
4
2
4
Section 22 Analog Front End Interface (AFEIF)
4
2
AFECI
Page 749 of 1414

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