HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 924

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 26 LCD Controller (LCDC)
Notes: 1. When connecting the LCDC to a TFT panel with an unwired 18-bit bus, the lower bit
Figure 26.1 shows a block diagram of LCDC.
Page 864 of 1414
Bus clock (Bφ)
Peripheral
Peripheral
LCD_CLK
clock (Pφ)
2. For details, see section 26.4.1, LCD Module Sizes which can be Displayed in this
bus
lines should be connected to GND or to the lowest bit from which data is output.
LCDC.
4 bytes × 256 entries
Pallet RAM
Register
Figure 26.1 LCDC Block Diagram
External memory (VRAM)
Bus interface
generator
BSC
Clock
DOTCLK
LCDC
Power control
Line buffer
2.4 kbytes
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
LCD_CL1
LCD_CL2
LCD_FLM
LCD_DATA 15 to 0
LCD_DON
LCD_VCPWC
LCD_VEPWC
LCD_M_DISP
Sep 21, 2010

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