HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 869

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
4
3
2
1
Bit Name
EP2
EMPTY
SETUP TS 0
EP0o TS
EP0i TR
Initial Value
1
0
0
R/W Description
R
R/W EP0o Receive Complete
R/W EP0i Transfer Request
R/W Setup Command Receive Complete
EP2 (Bulk-in) FIFO Empty
[Setting conditions]
[Clearing condition]
When both of FIFO buffers are not empty.
Note: EP2 EMPTY is a status bit, and cannot be
[Setting condition]
When 8-byte data that decodes the command by the
function is normally received from the host to EP0s
and an ACK handshake is returned to the host from
the function.
[Clearing conditions]
[Setting condition]
When data is normally received from the host to EP0o
and an ACK handshake is returned from the function
to the host.
[Clearing conditions]
[Setting condition]
When IN token is issued from the host to EP0i and the
FIFO buffer is empty.
[Clearing conditions]
When reset
The FIFO buffer of EP2 has a dual-buffer
configuration, and this bit is set when at least one
of the FIFO buffer is empty.
When reset
When 0 is written to by CPU
When reset
When 0 is written to by CPU
When reset
When 0 is written to by CPU
cleared.
Section 25 USB Function Controller (USBF)
Page 809 of 1414

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