HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 62

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 1 Overview
Table 1.1
Page 2 of 1414
Item
CPU
DSP operating
unit
SH7720/SH7721 Features
Features
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Renesas Original SuperH architecture
Upper compatibility with SH-1, SH-2, and SH3-DSP at object code level
32-bit internal data bus
General-register
⎯ Sixteen 32-bit general registers (eight 32-bit shadow registers)
⎯ Five 32-bit control registers
⎯ Four 32-bit system registers
RISC type instruction set
⎯ Instruction length: 16-bit fixed length for improved code efficiency
⎯ Load/store architecture
⎯ Delayed branch instruction
⎯ Instruction set based on C language
Instruction execution time: One instruction/cycle for basic instructions
Logical address space: 4 Gbytes
Space identifier ASID: 8 bits, 256 logical address spaces
Five-stage pipeline
Mixture of 16-bit and 32-bit instructions
32-/40-bit internal data bus
Multiplier, ALU, barrel shifter, and DSP register
16-bit x 16-bit → 32-bit one cycle multiplier
Large-capacity DSP data register file
⎯ Six 32-bit data registers
⎯ Two 40-bit data registers
Extended Harvard architecture for DSP data buses
⎯ Two data buses
⎯ One instruction bus
Up to four parallel operations: ALU, multiply, two loads, and store
Two address units to generating addresses for two memory access
DSP data addressing modes: Increment, index register addition (with or
without modulo addressing)
Zero-overhead repeat loop control
Conditional execution instructions
User DSP mode and privileged DSP mode
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010