HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 177

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
SH7720 Group, SH7721 Group
The DSR is assigned to the system registers. For the DSR, the following load and store
instructions are supported.
If the DSR is read by the STS instruction, upper bits (bits 31 to 16) are all 0.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bits
0
STS DSR,Rn;
STS.L DSR,@-Rn;
LDS Rn,DSR;
LDS.L @Rn+,DSR;
Bit Name
DC
Initial
Value
0
R/W
R/W
Function
DSP Status Bit
Sets the status of the operation result in the mode
designated by the CS bits
0: Designated mode status has not occurred
1: Designated mode status has occurred
Indicates the operation result by carry or borrow
regardless of the CS bit status after the PADDC or
PSUBC instruction has been executed.
Section 3 DSP Operating Unit
Page 117 of 1414

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