HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 18

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.4
17.5
Section 18 Serial Communication Interface with FIFO (SCIF)........................587
18.1
18.2
18.3
18.4
18.5
Page xviii of lx
17.3.12 Day of Week Alarm Register (RWKAR) ......................................................... 574
17.3.13 Date Alarm Register (RDAYAR) ..................................................................... 575
17.3.14 Month Alarm Register (RMONAR) ................................................................. 576
17.3.15 Year Alarm Register (RYRAR)........................................................................ 576
17.3.16 RTC Control Register 1 (RCR1)....................................................................... 577
17.3.17 RTC Control Register 2 (RCR2)....................................................................... 579
17.3.18 RTC Control Register 3 (RCR3)....................................................................... 581
Operation .......................................................................................................................... 582
17.4.1
17.4.2
17.4.3
17.4.4
Usage Notes ...................................................................................................................... 585
17.5.1
17.5.2
17.5.3
17.5.4
Features............................................................................................................................. 587
Input/Output Pins.............................................................................................................. 590
Register Descriptions........................................................................................................ 591
18.3.1
18.3.2
18.3.3
18.3.4
18.3.5
18.3.6
18.3.7
18.3.8
18.3.9
18.3.10 FIFO Control Register (SCFCR) ...................................................................... 611
18.3.11 FIFO Data Count Register (SCFDR) ................................................................ 614
18.3.12 Transmit Data Stop Register (SCTDSR) .......................................................... 615
Operation .......................................................................................................................... 615
18.4.1
18.4.2
18.4.3
18.4.4
Interrupt Sources and DMAC ........................................................................................... 637
Initial Settings of Registers after Power-On ..................................................... 582
Setting Time...................................................................................................... 582
Reading Time.................................................................................................... 583
Alarm Function ................................................................................................. 584
Register Writing during RTC Count................................................................. 585
Use of Realtime Clock (RTC) Periodic Interrupts............................................ 585
Transition to Standby Mode after Setting Register........................................... 585
Crystal Oscillator Circuit .................................................................................. 586
Receive Shift Register (SCRSR)....................................................................... 592
Receive FIFO Data Register (SCFRDR) .......................................................... 592
Transmit Shift Register (SCTSR) ..................................................................... 592
Transmit FIFO Data Register (SCFTDR) ......................................................... 592
Serial Mode Register (SCSMR)........................................................................ 593
Serial Control Register (SCSCR)...................................................................... 597
FIFO Error Count Register (SCFER)................................................................ 601
Serial Status Register (SCSSR) ........................................................................ 602
Bit Rate Register (SCBRR) .............................................................................. 609
Asynchronous Mode ......................................................................................... 615
Serial Operation ................................................................................................ 616
Synchronous Mode ........................................................................................... 626
Serial Operation in Synchronous Mode ............................................................ 627
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010