HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 900

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 25 USB Function Controller (USBF)
• Setup Stage
Page 840 of 1414
Notes: 1 In the setup stage, the application analyzes command data from the host requiring processing by
Receive 8-byte command
SETUP token reception
reception complete flag
2 When the transfer direction is control-out, the EP0i transfer request interrupt required in the status
(IFR0/SETUP TS = 1)
Set setup command
to be processed by
the application, and determines the subsequent processing (for example, data stage direction, etc.).
stage should be enabled here. When the transfer direction is control-in, this interrupt is not required
and should be disabled.
To data stage
data in EP0s
application?
Command
USB function
Yes
Figure 25.6 Setup Stage Operation
No
processing by
Interrupt request
this module
Automatic
Clear EP0o FIFO (FCLR/EP0oCLR = 1)
Clear EP0i FIFO (FCLR/EP0iCLR = 1)
To control-in
Write 1 to EP0s read complete bit
data stage
Determine data stage direction
Read 8-byte data from EP0s
Decode command data
(TRG/EP0s RDFN = 1)
(IFR0/SETUP TS = 0)
Clear SETUP TS flag
Application
*2
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
To control-out
data stage
*1
Sep 21, 2010