HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1056
HD6417720BP133BV
Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.R8A77210C133BAV.pdf
(1478 pages)
Specifications of HD6417720BP133BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
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Section 30 SIM Card Module (SIM)
Page 996 of 1414
Bit
6
Bit Name
RDRF
Initial
Value
0
R/W
R/W
Description
Receive Data Register Full
Indicates that received data is stored in the receive data
register (SCRDR).
0: Indicates that no valid received data is stored in SCRDR
[Clearing conditions]
•
•
•
1: Indicates that valid received data is stored in SCRDR
[Setting condition]
When serial reception is completed normally, and received
data is transferred from SCRSR to SCRDR.
Note: In T = 0 mode, when a parity error is detected during
On reset
When data is read from SCRDR
When 0 is written to RDRF
reception, the SCRDR contents and RDRF flag are
unaffected, and the previous state is retained.
On the other hand, in T = 1 mode, when a parity
error is detected during reception, the received data
is transferred to SCRDR, and the RDRF flag is set to
1.
In both T = 0 and T = 1 modes, even if the RE bit in
the serial control register (SCSCR) is cleared to 0,
the SCRDR contents and RDRF flag are unaffected,
and the previous state is retained.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
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