HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 383

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
(5)
• CS0WCR
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
31 to 18 ⎯
17
16
15 to 11 ⎯
10
9
8
7
Burst ROM (Clock Synchronous)
Bit Name
BW1
BW0
W3
W2
W1
W0
Initial
Value
All 0
0
0
All 0
1
0
1
0
R/W
R
R/W
R/W
R
R/W
R/W
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Burst Wait Cycles
Specify the number of wait cycles to be inserted between the
second or later access cycles in burst access.
00: 0 cycles
01: 1 cycle
10: 2 cycles
11: 3 cycles
Reserved
These bits are always read as 0. The write value should
always be 0.
Number of Access Wait Cycles
Specify the number of wait cycles to be inserted in the first
access cycle.
0000: 0 cycles
0001: 1 cycle
0010: 2 cycles
0011: 3 cycles
0100: 4 cycles
0101: 5 cycles
0110: 6 cycles
0111: 8 cycles
1000: 10 cycles
1001: 12 cycles
1010: 14 cycles
1011: 18 cycles
1100: 24 cycles
1101: Reserved (setting prohibited)
1110: Reserved (setting prohibited)
1111: Reserved (setting prohibited)
Section 9 Bus State Controller (BSC)
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