HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 142

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 3 DSP Operating Unit
(4)
DSP unit operation instructions are called DSP data operation instructions. These instructions are
provided to execute digital signal processing operations at high speed using the DSP. Instruction
codes for these instructions are 32 bits. The DSP data operation instruction fields consist of two
fields: field A and field B. In field A, a function for double data transfer instructions can be
described. In field B, ALU operation instructions and multiply instructions can be described. The
instructions described in fields A and B can be executed in parallel. A maximum of four
instructions (ALU operation, multiply, and two data transfers) can be executed in parallel. For
details, refer to section 3.5, DSP Data Operation Instructions.
Notes: 1. 32-bit instruction codes are handled as two consecutive 16-bit instruction codes.
Page 82 of 1414
DSP Unit Operation Instructions
2. In little endian, the upper and lower words must be stored in memory as data to be
Accordingly, 32-bit instruction codes can be assigned to a word boundary. 32-bit
instruction codes must be stored in memory, upper word and lower word, in this order,
in word units.
accessed in word units.
CPU core instruction
Double-data transfer instruction
Single-data transfer instruction
DSP data operation instruction
15
15
15
31
Figure 3.1 DSP Instruction Format
0000
1110
111100
111101
111110
26 25
12 11
10
10
9
9
A Field
A Field
A Field
*
16
0
0
0
15
B Field
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
0
Sep 21, 2010