HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 233

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
4.2
There are four registers for MMU processing. These are all peripheral module registers, so they
are located in address space area P4 and can only be accessed from privileged mode by specifying
the address.
The MMU has the following registers. Refer to section 37, List of Registers, for more details on
the addresses and access size of these registers.
• Page table entry register high (PTEH)
• Page table entry register low (PTEL)
• Translation table base register (TTB)
• MMU control register (MMUCR)
4.2.1
The page table entry register high (PTEH) register residing at address H'FFFF FFF0, which
consists of a virtual page number (VPN) and ASID. The VPN set is the VPN of the virtual address
at which the exception is generated in case of an MMU exception or address error exception.
When the page size is 4 kbytes, the VPN is the upper 20 bits of the virtual address, but in this case
the upper 22 bits of the virtual address are set. The VPN can also be modified by software. As the
ASID, software sets the number of the currently executing process. The VPN and ASID are
recorded in the TLB by the LDTLB instruction.
A program that modifies the ASID in PTEH should be allocated in the P1 or P2 areas.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
31 to 10 VPN
9, 8
7 to 0
Register Descriptions
Page Table Entry Register High (PTEH)
Bit Name
⎯
ASID
Initial
Value
⎯
All 0
⎯
R/W
R/W
R
R/W
Description
These bits are always read as 0. The write value
should always be 0.
The Number of the Logical Page
Reserved
Address Space Identifier
Section 4 Memory Management Unit (MMU)
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