HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 338

Manufacturer Part Number

HD6417720BP133BV

SH3-DSP, WITH USB AND LCDC, PB-F

Manufacturer

Renesas Electronics America

SuperH® SH7700r

Core Processor

Connectivity

FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB

DMA, LCD, POR, WDT

Number Of I /o

Program Memory Type

Voltage - Supply (vcc/vdd)

1.4 V ~ 1.6 V

Data Converters

A/D 4x10b; D/A 2x8b

Oscillator Type

Operating Temperature

-20°C ~ 75°C

Package / Case

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Program Memory Size

Section 8 Interrupt Controller (INTC)

When handling multiple interrupts, an interrupt handler should include the following procedures:

1. To determine the interrupt source, branch to a specific interrupt handler corresponding to a

2. Clear the interrupt source in each specific handler.

3. Save SSR and SPC to memory.

4. Clear the BL bit in SR, and set the accepted interrupt level in the interrupt mask bits in SR.

5. Handle the interrupt.

6. Execute the RTE instruction.

When these procedures are followed in order, an interrupt of higher priority than the one being

handled can be accepted after clearing BL in step 4. Figure 8.3 shows a sample interrupt operation

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code set in INTEVT or INTEVT2. The code in INTEVT or INTEVT2 can be used as an offset

for branching to the specific handler.

Multiple Interrupts

SH7720 Group, SH7721 Group

R01UH0083EJ0400 Rev. 4.00

Sep 21, 2010