HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1280

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Section 36 User Debugging Interface (H-UDI)
36.3
The H-UDI has the following registers. Refer to section 37, List of Registers, for more details on
the addresses and states of these registers in each operating mode.
• Bypass register (SDBPR)
• Instruction register (SDIR)
• Boundary scan register (SDBSR)
• ID register (SDID)
• Shift register
36.3.1
SDBPR is a 1-bit register that cannot be accessed by the CPU. When SDIR is set to the bypass
mode, SDBPR is connected between H-UDI pins TDI and TDO. The initial value is undefined.
36.3.2
SDIR is a 16-bit read-only register. The register is in JTAG IDCODE in its initial state. It is
initialized by TRST assertion or in the TAP test-logic-reset state, and can be written to by the H-
UDI irrespective of the CPU mode. Operation is not guaranteed if a reserved command is set in
this register.
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Bit
15 to 13
12
11 to 8
7 to 2
1
0
Bypass Register (SDBPR)
Instruction Register (SDIR)
Register Descriptions
Bit Name
TI7 to TI5
TI4
TI3 to TI0
⎯
⎯
⎯
Initial
Value
All 1
0
All 1
All 1
0
1
R/W
R
R
R
R
R
R
Description
Test Instruction 7 to 0
The H-UDI instruction is transferred to SDIR by a serial
input from TDI.
For commands, see table 36.2.
Reserved
These bits are always read as 1.
Reserved
This bit is always read as 0.
Reserved
This bit is always read as 1.
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010