HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 1173

• Manufacturer Part Number: HD6417720BP133BV
• Description: SH3-DSP, WITH USB AND LCDC, PB-F
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417720BP133BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 133MHz
• Connectivity: FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 117
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Data Converters: A/D 4x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

SH7720 Group, SH7721 Group
33.2
The user break controller has the following registers. Refer to section 37, List of Registers, for
more details on the addresses and access size of these registers.
• Break address register A (BARA)
• Break address mask register A (BAMRA)
• Break bus cycle register A (BBRA)
• Break address register B (BARB)
• Break address mask register B (BAMRB)
• Break bus cycle register B (BBRB)
• Break data register B (BDRB)
• Break data mask register B (BDMRB)
• Break control register (BRCR)
• Execution times break register (BETR)
• Branch source register (BRSR)
• Branch destination register (BRDR)
• Break ASID register A (BASRA)
• Break ASID register B (BASRB)
33.2.1
BARA is a 32-bit readable/writable register. BARA specifies the address used as a break condition
in channel A.
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010
Bit
31 to 0 BAA31 to
Bit Name
BAA0
Register Descriptions
Break Address Register A (BARA)
Initial
Value
All 0
R/W
R/W
Description
Break Address A
Store the address on the LAB or IAB specifying break
conditions of channel A.
Section 33 User Break Controller (UBC)
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