HD6417720BP133BV Renesas Electronics America, HD6417720BP133BV Datasheet - Page 656

SH3-DSP, WITH USB AND LCDC, PB-F

HD6417720BP133BV

Manufacturer Part Number
HD6417720BP133BV
Description
SH3-DSP, WITH USB AND LCDC, PB-F
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417720BP133BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
133MHz
Connectivity
FIFO, I²C, IrDA, MMC, SCI, SD, SIO, SIM, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
117
Program Memory Type
ROMless
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Data Converters
A/D 4x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Section 18 Serial Communication Interface with FIFO (SCIF)
Note: In synchronous mode, bits other than CKS1 and CKS0 are fixed 0.
Page 596 of 1414
Bit
3
2
1
0
Bit Name
STOP
CKS1
CKS0
Initial Value R/W
0
0
0
0
R/W
R
R/W
R/W
Description
Stop Bit Length
Selects one or two bits as the stop bit length.
In receiving, only the first stop bit is checked,
regardless of the STOP bit setting. If the second stop
bit is 1, it is treated as a stop bit, but if the second stop
bit is 0, it is treated as the start bit of the next incoming
character.
This setting is only valid in asynchronous mode. In
synchronous mode, this setting is invalid since stop
bits are not added.
0: One stop bit*
1: Two stop bits*
Notes: 1. In transmitting, a single bit of 1 is added at
Reserved
This bit is always read as 0. The write value should
always be 0.
Clock Select 1 and 0
These bits select the internal clock source of the on-
chip baud rate generator.
00: Pφ
01: Pφ/4
10: Pφ/16
11: Pφ/64
2. In transmitting, two bits of 1 are added at
the end of each transmitted character.
the end of each transmitted character.
1
2
SH7720 Group, SH7721 Group
R01UH0083EJ0400 Rev. 4.00
Sep 21, 2010

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