LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 208

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
6.6.4 GPIO Interrupt Status for Rising edge register (IO0IntStatR - 0xE002 8084
6.6.5 GPIO Interrupt Status for Falling edge register (IO0IntStatF - 0xE002 8088
6.6.6 GPIO Interrupt Clear register (IO0IntClr - 0xE002 808C and IO2IntClr -
and IO2IntStatR - 0xE002 80A4)
Each bit in these read-only registers indicates the rising edge interrupt status for the
corresponding port.
Table 178. GPIO Status for Rising edge register (IO0IntStatR - address 0xE002 8084 and
and IO2IntStatF - 0xE002 80A8)
Each bit in these read-only registers indicates the rising edge interrupt status for the
corresponding port.
Table 179. GPIO Status for Falling edge register (IO0IntStatF - address 0xE002 8088 and
0xE002 80AC)
Writing a 1 into each bit in these write-only registers clears any interrupts for the
corresponding GPIO port pin.
Table 180. GPIO Status for Falling edge register (IO0IntClr - address 0xE002 808C and
Bit
31:0
Bit
31:0
Bit
31:0
Symbol
P0xREI
and
P2xREI
Symbol
P0xFEI
and
P2xFEI
Symbol
P0xCI
and
P2xCI
IO2IntStatR - address 0xE002 80A4) bit description
IO2IntStatF - address 0xE002 80A8) bit description
IO2IntClr - address 0xE002 80AC) bit description
Value Description
0
1
Value Description
0
1
Value Description
0
1
Rev. 04 — 26 August 2009
Clear GPIO port Interrupt. Bit 0 in IOxIntClr corresponds to pin
Px.0, bit 31 in IOxIntClr corresponds to pin Px.31.
Corresponding bit in IOxIntStatR and/or IOxIntStatF is
unchanged.
Corresponding bit in IOxIntStatR and IOxStatF is cleared to 0.
Rising Edge Interrupt status. Bit 0 in IOxIntStatR corresponds to
pin Px.0, bit 31 in IOxIntStatR corresponds to pin Px.31.
Rising edge has not been detected on the corresponding pin.
An interrupt is generated due to a rising edge on the
corresponding pin.
Falling Edge Interrupt status. Bit 0 in IOxIntStatF corresponds to
pin Px.0, bit 31 in IOxIntStatF corresponds to pin Px.31.
Falling edge has not been detected on the corresponding pin.
An interrupt is generated due to a falling edge on the
corresponding pin.
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
value
0
Reset
value
0
Reset
value
0