LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 342

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
Table 302. USB Device Interrupt Clear register (USBDevIntClr - address 0xFFE0 C208) bit allocation
Reset value: 0x0000 0000
Table 303. USB Device Interrupt Clear register (USBDevIntClr - address 0xFFE0 C208) bit description
Table 304. USB Device Interrupt Set register (USBDevIntSet - address 0xFFE0 C20C) bit allocation
Reset value: 0x0000 0000
Table 305. USB Device Interrupt Set register (USBDevIntSet - address 0xFFE0 C20C) bit description
UM10237_4
User manual
Bit
31:0
Bit
31:0
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Symbol
See
USBDevIntClr
bit allocation
table above
Symbol
See
USBDevIntSet
bit allocation
table above
TxENDPKT
TxENDPKT
9.3.5 USB Device Interrupt Set register (USBDevIntSet - 0xFFE0 C20C)
31
23
15
31
23
15
7
7
-
-
-
-
-
-
Value
0
1
Value
0
1
Writing one to a bit in this register sets the corresponding bit in the
zero has no effect
USBDevIntSet is a write only register.
ENDPKT
ENDPKT
Rx
Rx
30
22
14
30
22
14
6
6
Description
No effect.
The corresponding bit in USBDevIntSt
Description
No effect.
The corresponding bit in USBDevIntSt
-
-
-
-
-
-
CDFULL
CDFULL
29
21
13
29
21
13
5
5
-
-
-
-
-
-
Rev. 04 — 26 August 2009
CCEMPTY
CCEMPTY
28
20
12
28
20
12
4
4
-
-
-
-
-
-
DEV_STAT
DEV_STAT
Chapter 13: LPC24XX USB device controller
(Section
(Section
27
19
27
19
11
11
3
3
-
-
-
-
-
-
13–9.3.2) is cleared.
13–9.3.2) is set.
EP_SLOW
EP_SLOW
26
18
10
26
18
10
2
2
-
-
-
-
-
-
ERR_INT
EP_FAST
ERR_INT
EP_FAST
USBDevIntSt
25
17
25
17
UM10237
9
1
9
1
-
-
-
-
© NXP B.V. 2009. All rights reserved.
Reset value
0
Reset value
0
EP_RLZED
EP_RLZED
. Writing a
FRAME
FRAME
342 of 792
24
16
24
16
8
0
8
0
-
-
-
-