LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 448

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
4.4 UART1 Interrupt Enable Register (U1IER - 0xE001 0004, when
Table 399. UART1 Divisor Latch LSB Register (U1DLL - address 0xE001 0000 when
Table 400. UART1 Divisor Latch MSB Register (U1DLM - address 0xE001 0004 when
DLAB = 0)
The U1IER is used to enable the four UART1 interrupt sources.
Table 401. UART1 Interrupt Enable Register (U1IER - address 0xE001 0004 when DLAB = 0)
Bit
7:0
Bit
7:0
Bit
0
1
2
3
6:4
Symbol
DLLSB
Symbol
DLMSB
Symbol
RBR
Interrupt
Enable
THRE
Interrupt
Enable
RX Line
Interrupt
Enable
Modem
Status
Interrupt
Enable
-
DLAB = 1) bit description
DLAB = 1) bit description
bit description
Description
The UART1 Divisor Latch LSB Register, along with the U1DLM
register, determines the baud rate of the UART1.
Description
The UART1 Divisor Latch MSB Register, along with the U1DLL
register, determines the baud rate of the UART1.
Value
UART1
Rev. 04 — 26 August 2009
0
1
0
1
0
1
0
1
baudrate
Description
enables the Receive Data Available interrupt for UART1. It
also controls the Character Receive Time-out interrupt.
Disable the RDA interrupts.
Enable the RDA interrupts.
enables the THRE interrupt for UART1. The status of this
interrupt can be read from U1LSR[5].
Disable the THRE interrupts.
Enable the THRE interrupts.
enables the UART1 RX line status interrupts. The status of
this interrupt can be read from U1LSR[4:1].
Disable the RX line status interrupts.
Enable the RX line status interrupts.
enables the modem interrupt. The status of this interrupt
can be read from U1MSR[3:0].
Disable the modem interrupt.
Enable the modem interrupt.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
=
------------------------------------------------------------------------------- -
16
×
(
256
×
U1DLM
pclk
Chapter 17: LPC24XX UART1
+
U1DLL
)
UM10237
© NXP B.V. 2009. All rights reserved.
Reset Value
0x01
Reset Value
0x00
448 of 792
Reset
Value
0
0
0
0
NA
(3)