LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 674

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

1. Basic configuration
2. Features
3. Pin description
4. Register description (DACR - 0xE006 C000)
UM10237_4
User manual
The DAC is configured using the following registers:
Table 29–598
Table 598. D/A Pin Description
Remark: When the DAC is not used, the V
power supply, and pin V
This read/write register includes the digital value to be converted to analog, and a bit that
trades off performance vs. power. Bits 5:0 are reserved for future, higher-resolution D/A
converters.
Pin
AOUT
VREF
V
1. Power: The DAC is always on.
2. Clock: In the PCLK_SEL0 register
3. Pins: Select the DAC pin and pin mode in registers PINSEL1 and PINMODE1 (see
•
•
•
•
•
DDA
UM10237
Chapter 29: LPC24XX Digital-to Analog Converter (DAC)
Rev. 04 — 26 August 2009
Section
10 bit digital to analog converter
Resistor string architecture
Buffered output
Power-down mode
Selectable speed vs. power
, V
SSA
9–5).
gives a brief summary of each of DAC related pins.
Type
Output
Reference
Power
Rev. 04 — 26 August 2009
SSA
Description
Analog Output. After the selected settling time after the DACR is
written with a new value, the voltage on this pin (with respect to
V
Voltage Reference. This pin provides a voltage reference level for
the D/A converter.
Analog Power and Ground. These should be nominally the same
voltages as V
noise and error.
must be grounded. These pins should not be left floating.
SSA
) is VALUE/1024 × VREF.
(Table
DD(3V3)
DDA
4–56), select PCLK_DAC.
and V
and VREF pins must be connected to the
SS
, but should be isolated to minimize
© NXP B.V. 2009. All rights reserved.
User manual
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