LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 245

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
Fig 29. Transmit descriptor memory layout
TxDescriptorNumber
8.2 Transmit descriptors and statuses
TxDescriptor
1
2
3
4
5
Figure 11–29
Transmit descriptors are stored in an array in memory. The lowest address of the transmit
descriptor array is stored in the TxDescriptor register, and must be aligned on a 4 byte
address boundary. The number of descriptors in the array is stored in the
TxDescriptorNumber register using a minus one encoding style i.e. if the array has 8
elements the register value should be 7. Parallel to the descriptors there is an array of
statuses. For each element of the descriptor array there is an associated status field in the
status array. The base address of the status array is stored in the TxStatus register, and
must be aligned on a 4 byte address boundary. During operation (when the transmit
datapath is enabled) the TxDescriptor, TxStatus, and TxDescriptorNumber registers
should not be modified.
Two registers, TxConsumeIndex and TxProduceIndex, define the descriptor locations that
will be used next by hardware and software. Both register act as counters starting at 0 and
wrapping when they reach the value of TxDescriptorNumber. The TxProduceIndex
contains the index of the next descriptor that is going to be filled by the software driver.
The TxConsumeIndex contains the index of the next descriptor going to be transmitted by
the hardware. When TxProduceIndex == TxConsumeIndex, the transmit buffer is empty.
When TxProduceIndex == TxConsumeIndex -1 (taking wraparound into account), the
transmit buffer is full and the software driver cannot add new descriptors until the
hardware has transmitted one or more frames to free up descriptors.
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
CONTROL
PACKET
PACKET
PACKET
PACKET
PACKET
PACKET
depicts the layout of the transmit descriptors in memory.
Rev. 04 — 26 August 2009
DATA BUFFER
DATA BUFFER
DATA BUFFER
DATA BUFFER
DATA BUFFER
DATA BUFFER
TxStatus
Chapter 11: LPC24XX Ethernet
StatusInfo
StatusInfo
StatusInfo
StatusInfo
StatusInfo
StatusInfo
UM10237
© NXP B.V. 2009. All rights reserved.
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