LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 316

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
7.13 Upper Panel Current Address register (LCD_UPCURR, RW - 0xFFE1
7.14 Lower Panel Current Address register (LCD_LPCURR, RW - 0xFFE1
7.15 Color Palette registers (LCD_PAL, RW - 0xFFE1 0200 to 0xFFE1 03FC)
Table 271. Interrupt Clear register (LCD_INTCLR, RW - 0xFFE1 0028)
002C)
The LCD_UPCURR register is Read-Only, and contains an approximate value of the
upper panel data DMA address when read.
Note: This register can change at any time and therefore can only be used as a rough
indication of display position.
The contents of the LCD_UPCURR register are described in
Table 272. Upper Panel Current Address register (LCD_UPCURR, RW - 0xFFE1 002C)
0030)
The LCD_LPCURR register is Read-Only, and contains an approximate value of the lower
panel data DMA address when read.
Note: This register can change at any time and therefore can only be used as a rough
indication of display position.
The contents of the LCD_LPCURR are described in
Table 273. Lower Panel Current Address register (LCD_LPCURR, RW - 0xFFE1 0030)
The LCD_PAL register contain 256 palette entries organized as 128 locations of two
entries per word.
Bits
2
1
0
Bits
31:0
Bits
31:0
Function
LNBUIC
FUFIC
reserved
Function
LCDUPCURR LCD Upper Panel Current Address.
Function
LCDLPCURR
Rev. 04 — 26 August 2009
Description
LCD next address base update interrupt clear.
Writing a 1 to this bit clears the LCD next address base update
interrupt.
FIFO underflow interrupt clear.
Writing a 1 to this bit clears the FIFO underflow interrupt.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Description
Contains the current LCD upper panel data DMA address.
Description
LCD Lower Panel Current Address.
Contains the current LCD lower panel data DMA address.
Chapter 12: LPC24XX LCD controller
Table
12–273.
Table
12–272.
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
value
0x0
0x0
-
Reset
value
0x0
Reset
value
0x0