LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 395

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
5. Modes of operation
6. Pin configuration
UM10237_4
User manual
Fig 52. USB OTG controller block diagram
DMA interface
(AHB master)
(AHB slave)
interface
register
support an OTG connection. The communication between the register interface and an
external OTG transceiver is handled through an I
OTG transceiver interrupt signal.
For USB connections that use the device or host controller only (not OTG), the ports use
an embedded USB Analog Transceiver (ATX).
The OTG controller is capable of operating in the following modes:
The OTG controller has two USB ports indicated by suffixes 1 and 2 in the USB pin names
and referred to as USB port 1 (U1) and USB port 2 (U2) in the following text.
•
•
•
USB OTG BLOCK
One port host and one port dual-role device (see
One port host and one port device (see
Two-port host (see
INTERFACE
INTERFACE
REGISTER
MASTER
BUS
Rev. 04 — 26 August 2009
Figure
CONTROLLER
CONTROLLER
CONTROLLER
15–56)
CONTROLLER
DEVICE
HOST
I2C
OTG
EP_RAM
Figure
Chapter 15: LPC24XX USB OTG controller
port 1
port 1
port 2
2
C interface and through the external
15–55)
CONTROL
LOGIC/
PORT
MUX
Figure
ATX
15–53)
USB
USB
ATX
ATX
UM10237
© NXP B.V. 2009. All rights reserved.
TRANSCEIVER
port
U1
port
U2
OTG
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