LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 376

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
14.4 The DMA descriptor
In DMA mode, the bits corresponding to Interrupt on NAK for Bulk OUT and Interrupt OUT
endpoints (INAK_BO and INAK_IO) should be set to 0 using the SIE Set Mode command
(Section
DMA transfers are described by a data structure called the DMA Descriptor (DD).
DDs are placed in the USB RAM. These descriptors can be located anywhere in the USB
RAM at word-aligned addresses. USB RAM is part of the system memory that is used for
the USB purposes. It is located at address 0x7FD0 0000 and is 8 kB in size.
DDs for non-isochronous endpoints are four words long. DDs for isochronous endpoints
are five words long.
The parameters associated with a DMA transfer are:
Table 13–357
Table 357. DMA descriptor
Word
position
0
1
2
•
•
•
•
•
•
The start address of the DMA buffer
The length of the DMA buffer
The start address of the next DMA descriptor
Control information
Count information (number of bytes transferred)
Status information
13–11.3).
Access
(H/W)
R
R
R
-
R
R
R/W
R/W
[1]
lists the DMA descriptor fields.
Access
(S/W)
R/W
R/W
R/W
-
R/W
R/W
R/W
R/W
Rev. 04 — 26 August 2009
Bit
position
31:0
1:0
2
3
4
15:5
31:16
31:0
Description
Next_DD_pointer (USB RAM address)
DMA_mode (00 -Normal; 01 - ATLE)
Next_DD_valid (1 - valid; 0 - invalid)
Reserved
Isochronous_endpoint (1 - isochronous;
0 - non-isochronous)
Max_packet_size
DMA_buffer_length
This value is specified in bytes for non-isochronous
endpoints and in number of packets for isochronous
endpoints.
DMA_buffer_start_addr
Chapter 13: LPC24XX USB device controller
UM10237
© NXP B.V. 2009. All rights reserved.
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