LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 425

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

Table 377. UART Register Map
Generic
Name
RBR
(DLAB=
0)
THR
(DLAB=
0)
DLL
(DLAB=
1)
DLM
(DLAB=
1)
IER
(DLAB=
0)
IIR
FCR
LCR
Description
Receiver Buffer
Register
Transmit
Holding
Register
Divisor Latch
LSB
Divisor Latch
MSB
Interrupt Enable
Register
Interrupt ID
Register
FIFO Control
Register
Line Control
Register
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
Bit functions and addresses
FIFOs Enabled
DLAB
MSB
BIT7
RX Trigger
Break
BIT6
Set
Parity
BIT5
Stick
0
Reserved
Reserved
0
Reserved
Select
Parity
Even
BIT4
8 bit Read Data
8 bit Write Data
8 bit Data
8 bit Data
Enable
Parity
BIT3
IIR3
TX FIFO
Interrupt
RX Line
Number
Enable
of Stop
Status
Reset
BIT2
IIR2
Bits
Auto- Baud
Time- Out
ABTOInt
RX FIFO
Interrupt
Interrupt
Enable
Enable
Word Length Select
THRE
Reset
BIT1
IIR1
Enable End
Enable RX
Available
ABEOint
Interrupt
Interrupt
of Auto-
Enable
Baud
FIFO
BIT0
Data
LSB
IIR0
Acces
s
RO
WO
R/W
R/W
R/W
RO
WO
R/W
0x01
0x00
Reset
value
1]
NA
NA
0x01
0x00
0x00
0x00
[
UARTn Register
Name & Address
U0RBR -
0xE000 C000
U2RBR - 0xE007 8000
U3RBR -
0xE007 C000
U0THR - 0xE000 C000
U2THR - 0xE007 8000
U3THR - 0xE007 C000
U0DLL - 0xE000 C000
U2DLL - 0xE007 8000
U3DLL - 0xE007 C000
U0DLM -
0xE000 C004
U2DLM - 0xE007 8004
U3DLM -
0xE007 C004
U0IER - 0xE000 C004
U2IER - 0xE007 8004
U3IER - 0xE007 C004
U0IIR - 0xE000 C008
U2IIR - 0xE007 8008
U3IIR - 0xE007 C008
U0FCR - 0xE000 C008
U2FCR - 0xE007 8008
U3FCR - 0xE007 C008
U0LCR -
0xE000 C00C
U2LCR - 0xE007 800C
U3LCR -
0xE007 C00C