LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 464
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
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Quantity:
6 174
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Part Number:
LPC2468FET208,551
Manufacturer:
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UM10237_4
User manual
4.17.1.1 Example 1: PCLK = 14.7456 MHz, BR = 9600
4.17.1.2 Example 2: PCLK = 12 MHz, BR = 115200
4.18 UART1 Transmit Enable Register (U1TER - 0xE001 0030)
Table 413. Fractional Divider setting look-up table
According to the the provided algorithm DL
9600) = 96. Since this DL
DLM = 0, and DLL = 96.
According to the the provided algorithm DL
= 6.51. This DL
parameter. Using an initial estimate of FR
is recalculated as FR
and 1.9, DIVADDVAL and MULVAL values can be obtained from the attached look-up
table.
The closest value for FRest = 1.628 in the look-up
equivalent to DIVADDVAL = 5 and MULVAL = 8.
Based on these findings, the suggested UART setup would be: DLM = 0, DLL = 4,
DIVADDVAL = 5, and MULVAL = 8. According to
rate has a relative error of 0.16% from the originally specified 115200.
In addition to being equipped with full hardware flow control (auto-cts and auto-rts
mechanisms described above), U1TER enables implementation of software flow control,
too. When TxEn=1, UART1 transmitter will keep sending data as long as they are
available. As soon as TxEn becomes 0, UART1 transmission will stop.
FR
1.000
1.067
1.071
1.077
1.083
1.091
1.100
1.111
1.125
1.133
1.143
1.154
1.167
1.182
1.200
1.214
1.222
1.231
DivAddVal/
MulVal
0/1
1/15
1/14
1/13
1/12
1/11
1/10
1/9
1/8
2/15
1/7
2/13
1/6
2/11
1/5
3/14
2/9
3/13
est
is not an integer number and the next step is to estimate the FR
est
Rev. 04 — 26 August 2009
FR
1.250
1.267
1.273
1.286
1.300
1.308
1.333
1.357
1.364
1.375
1.385
1.400
1.417
1.429
1.444
1.455
1.462
1.467
= 1.628. Since FRest = 1.628 is within the specified range of 1.1
est
is an integer number, DIVADDVAL = 0, MULVAL = 1,
DivAddVal/
MulVal
1/4
4/15
3/11
2/7
3/10
4/13
1/3
5/14
4/11
3/8
5/13
2/5
5/12
3/7
4/9
5/11
6/13
7/15
est
est
est
= 1.5 a new DL
FR
1.500
1.533
1.538
1.545
1.556
1.571
1.583
1.600
1.615
1.625
1.636
1.643
1.667
1.692
1.700
1.714
1.727
1.733
= PCLK/(16 x BR) = 12 MHz / (16 x 115200)
= PCLK/(16 x BR) = 14.7456 MHz / (16 x
Equation 17–5
Table 17–413
DivAddVal/
MulVal
1/2
8/15
7/13
6/11
5/9
4/7
7/12
3/5
8/13
5/8
7/11
9/14
2/3
9/13
7/10
5/7
8/11
11/15
Chapter 17: LPC24XX UART1
est
= 4 is calculated and FR
UART’s is 115384. This
is FR = 1.625. It is
FR
1.750
1.769
1.778
1.786
1.800
1.818
1.833
1.846
1.857
1.867
1.875
1.889
1.900
1.909
1.917
1.923
1.929
1.933
UM10237
© NXP B.V. 2009. All rights reserved.
DivAddVal/
MulVal
3/4
10/13
7/9
11/14
4/5
9/11
5/6
11/13
6/7
13/15
7/8
8/9
9/10
10/11
11/12
12/13
13/14
14/15
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