DF2117VT20V Renesas Electronics America, DF2117VT20V Datasheet - Page 113

MCU 16BIT FLASH 3V 160K 144-TQFP

DF2117VT20V

Manufacturer Part Number
DF2117VT20V
Description
MCU 16BIT FLASH 3V 160K 144-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VT20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-TQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VT20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VT20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
3.2.3
STCR enables or disables register access, IIC operating mode, and on-chip flash memory, and
selects the input clock of the timer counter.
Bit
7
6
5
4
Bit Name
IICX2
IICX1
IICX0
IICE
Serial Timer Control Register (STCR)
Initial
Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
I
These bits control the IIC operation. These bits select
the transfer rate in master mode together with bits
CKS2 to CKS0 in the I
details on the transfer rate, see table 18.4.
I
When the RELOCATE bit is cleared to 0, enables or
disables CPU access for IIC registers (ICCR, ICSR,
ICDR/SARX, ICMR/SAR, and ICRES), PWMX registers
(DADRAH/DACR, DADRAL, DADRBH/DACNTH, and
DADRBL/DACNTL), and SCI registers (SMR, BRR, and
SCMR).
0: SCI_1 registers are accessed in areas from
1: IIC_1 registers are accessed in areas from
When the RELOCATE bit is set to 1, this bit is disabled.
For details, see section 3.2.4, System Control Register
3 (SYSCR3) and section 27, List of Registers.
2
2
C Transfer Rate Select 2 to 0
C Master Enable
H'(FF)FF88 to H'(FF)FF89 and from H'(FF)FF8E to
H'(FF)FF8F.
SCI_2 registers are accessed in areas from
H'(FF)FFA0 to H'(FF)FFA1 and from H'(FF)FFA6 to
H'(FF)FFA7.
Access is prohibited in areas from H'(FF)FFD8 to
H'(FF)FFD9 and from H'(FF)FFDE to H'(FF)FFDF.
H'(FF)FF88 to H'(FF)FF89 and from H'(FF)FF8E to
H'(FF)FF8F.
PWMX registers are accessed in areas from
H'(FF)FFA0 to H'(FF)FFA1 and from H'(FF)FFA6 to
H'(FF)FFA7.
IIC_0 registers are accessed in areas from
H'(FF)FFD8 to H'(FF)FFD9 and from H'(FF)FFDE to
H'(FF)FFDF.
ICRES is accessed in areas of H'(FF)FEE6
Rev. 2.00 Sep. 28, 2009 Page 71 of 994
2
C bus mode register (ICMR). For
REJ09B0452-0200

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